Integrated Passive Components

Sponsor

Air Force Research Laboratory, Space Electronics Branch (AFRL/VSSE)

 

Team Members

Prof. Greg Donohoe, Electrical and Computer Engineering, University of Idaho. Principal Investigator.

Prof. Herb Hess, Electrical and Computer Engineering, University of Idaho. Co-Investigator.

Prof. Yang-Ki Hong, Electrical and Computer Engineering, University of Alabama, Co-Investigator

Prof. You Qiang, Physics, University of Idaho.

Prof. Kris Campbell, Materials Science and Engineering, Boise State University

 

Strategic Partner

American Semiconductor, Inc., Boise, ID

 

The Project

 

The primary goal is to developing new passive magnetic components (inductors and transformers) which we will integrate onto CMOS chips along with power conditioning circuits to provide regulated, point-of-load, on-chip power to the chips.

 

Motivation

 

The current trend is toward lower power supply voltages for VLSI chips, in order to reduce power consumption and to improve reliability. In recent years VDD has gone from 3.3V to down to 1.0V, with 0.5V on the near horizon. Delivering clean, regulated DC power across a circuit board and onto the chip is a big challenge. The alternative is to deliver higher voltages to the chip and down-convert to 0.5 V with on-chip circuits. This will require low-loss on-chip inductors with high inductance values. The current on-chip inductor technologies leave much to be desired.

 

An additional benefit will be to eliminate the dozens of passive components that surround a complex integrated circuit on today’s high-performance printed circuit boards.

 

Eliminated_passives.png

 

Method

 

·         Prof. Hess and his team will develop on-chip power circuits,  building on previous work. They will specify the inductive components they need.

·         Prof. Hong, a specialist in magnetic materials, will develop efficient thin-film inductor technologies at his lab at the University of Alabama.

·         American Semiconductor will provide access to their SOI CMOS process. We plan to integrate the inductors in the upper metal layers, as a “back end of the line” process

·         Prof. You Qiang will help to ensure manufacturability of the inductive components.

·         Prof. Kris Campbell will conduct parallel research in programmable resistors.