K. J. Hass, D. H. Lenhert and N. Ahmed,
On A Microcomputer Implementation of an Intrusion-Detection Algorithm,
IEEE Transactions on Acoustics, Speech and Signal Processing,
ASSP-27(6):782-789, December 1979.
K. J. Hass, R. K. Treece and A. E. Giddings,
A Radiation-Hardened 16/32-Bit Microprocessor,
IEEE Transactions on Nuclear Science,
36(6):2252-2257, December 1989.
F. W. Sexton, R. K. Treece, K. J. Hass, K. L. Hughes, G. L. Hash,
C. L. Axness, S. P. Buchner and K. Kang,
SEU Characterization and Design Dependence of the SA3300 Microprocessor,
IEEE Transactions on Nuclear Science,
37(6):1861-1868, December 1990.
F. W. Sexton, W. T. Corbett, R. K. Treece, K. J. Hass , K. L. Hughes,
C. L. Axness, G. L. Hash, M. R. Shaneyfelt and T. F. Wunsch,
SEU Simulation and Testing of Resistor-Hardened D-Latches in the
SA3300 Microprocessor,
IEEE Transactions on Nuclear Science,
38(6):1521-1528, December 1991.
K. J. Hass and J. W. Gambles,
Mitigating Single Event Upsets from Combinational Logic,
7th NASA Symposium on VLSI Design,
4.1.1-4.1.10, October 1998.
Proceedings paper, Acrobat pdf, 196k
Presentation viewgraphs, Acrobat pdf, 248k
K. J. Hass and D. F. Cox,
Transform Processing on a Reconfigurable Data Path Processor,
7th NASA Symposium on VLSI Design,
7.4.1-7.4.12, October 1998.
Proceedings paper, Acrobat pdf, 124k
Presentation viewgraphs, Acrobat pdf, 120k
K. J. Hass and J. W. Gambles
Single Event Transients in Deep Submicron CMOS,
42nd Midwest Symposium on Circuits and Systems,
August 1999.
Presentation viewgraphs, Acrobat pdf, 88k
K. Joe Hass,
Probabilistic Estimates of Upset Caused by Single Event Transients,
8th NASA Symposium on VLSI Design,
4.3.1-4.3.9, October 1999.
Proceedings paper, Acrobat pdf, 124k
Presentation viewgraphs, Acrobat pdf, 112k
Gregory W. Donohoe and K. Joseph Hass,
Reconfigurable Data Path Processor for Space Applications,
8th NASA Symposium on VLSI Design,
2.2.1-2.2.8, October 1999.
HTML version
Gregory W. Donohoe, K. Joseph Hass, Stephen Bruder and Pen-Shu Yeh,
A Reconfigurable Data Path Processor for Space Applications,
Proc. Military and Aerospace Applications of Programmable Logic Devices 2000,
Laurel, MD, September 24-28, 2000.
K. Joe Hass and David F. Cox,
Level Shifting Interfaces for Low Voltage Logic,
9th NASA Symposium on VLSI Design,
3.1.1-3.1.7, November 2000.
Proceedings paper, Acrobat pdf, 44k
K. Joe Hass and Harry C. Shaw,
Cryogenic Operation of Ultra Low Power CMOS,
9th NASA Symposium on VLSI Design,
3.4.1-3.4.7, November 2000.
Proceedings paper, Acrobat pdf, 32k
S. Whitaker, J. Hass, L. Davis, L. Arave, K. Arave and L. Miles,
Ultra-Low Power CCSDS Encoder,
9th NASA Symposium on VLSI Design,
3.5.1-3.5.7, November 2000.
K. Joseph Hass, Jack Venbrux and Prakash Bhatia,
Logic Design Considerations for 0.5-Volt CMOS,
2001 Conference on Advanced Research in VLSI,
75-85, March 14-16, 2001.
Presentation slides, StarOffice Impress, 333k
Presentation slides, PowerPoint, 323k
J. Piepmeier and J. Hass,
Ultra-low Power Digital Correlator for Passive Microwave Polarimetry,
NASA Earth Science Technology Conference,
August 30, 2001.
Harry F. Benz, Jody W. Gambles, Sterling R. Whitaker, Kenneth J. Hass, Pen-Shu Yeh and Gary K. Maki,
Low Power Radiation Tolerant VLSI for Advanced Spacecraft,
IEEE Aerospace Conference,
March 2002.
Brian Smith, K. Joe Hass and James Murguia,
Development of a Low Power Digital Signal Processor,
10th NASA Symposium on VLSI Design,
9.2.1-9.2.9, March 2002.
Proceedings paper, Acrobat pdf, 292k
L. Miles, J. Venbrux, J. Gambles, J. Hass, W. Smith, G. Maki and S. Whitaker,
An Ultra-Low-Power, Radiation-Tolerant Data/Image Compressor for Space Applications,
10th NASA Symposium on VLSI Design,
9.3.1-9.3.7, March 2002.
K. Joseph Hass,
Mainstreaming RHBD,
DARPA RADHARD By Design Workshop,
February 12, 2003.
K. E. Li, M. A. Xapsos, C. Poivey, R. F. Stone, P-S. Yeh, J. Gambles, J. Hass, G. Maki and J. Murguia,
Qualification of an Ultra-Low Power Reed Solomon Encoder for NASA's Space Technology 5 Mission,
HEART Conference,
March, 2003.
K. Joseph Hass and Jeffrey R. Piepmeier,
An Ultra-Low Power, Radiation Tolerant, High Speed Correlator,
11th NASA Symposium on VLSI Design,
May 2003.
Proceedings paper, Acrobat pdf, 156k
Jody W. Gambles, Kenneth J. Hass and Sterling R. Whitaker,
Radiation Hardness of Ultra Low Power CMOS VLSI,
11th NASA Symposium on VLSI Design,
May 2003.
Proceedings paper, Acrobat pdf, 296k
J. Gambles, L. Miles, J. Hass, W. Smith, S. Whitaker and B. Smith,
An Ultra-Low-Power, Radiation-Tolerant Reed Solomon Encoder for Space Applications,
IEEE Custom Integrated Circuits Conference,
September 2003.
Proceedings paper, Acrobat pdf, 124k
Jeffrey R. Piepmeier and K. Joseph Hass,
Ultralow-Power Digital Correlator for Microwave Polarimetry,
NASA Tech Briefs,
pp. 36-37, August 2004.
K. J. Hass, G. W. Donohoe and Y.-K. Hong,
SEU-Resistant Magnetic Flip Flops,
12th NASA Symposium on VLSI Design,
October 2005.
Proceedings paper, Acrobat pdf, 405k
J. Jabal, Y. Hong, H. Han, S. Gee, B. Choi, G. Abo, J. Hass and G. Donohoe,
Lateral Size Dependence of Pac-man shaped Ni80Fe20 Element on Magnetization Reversal,
IEEE International Magnetics Conference,
May 8-12, 2006.
B. Choi, Q. Xiao, Y. Hong, S. Gee, J. Jabal, H. Han, K. Hass and G. Donohoe,
Numerical Simulation Study of Magnetization Precession Dynamics in Submicron Elliptical Ni80Fe20 Thin Film Elements,
IEEE International Magnetics Conference,
May 8-12, 2006.
K.J. Hass, G.W. Donohoe, Y. Hong and B. Choi,
Magnetic Latches for Space Applications,
IEEE International Magnetics Conference,
May 8-12, 2006.
K.J. Hass, G.W. Donohoe, Y.-K. Hong and B. C. Choi,
Magnetic Flip Flops for Space Applications,
IEEE Transactions on Magnetics,
vol. 42, no. 10, pp. 2751-2753, Oct. 2006.
B. C. Choi, Q. F. Xiao, Y. K. Hong, S. H. Gee, J. Jabal, H. Han, K. J. Hass,
and G. W. Donohoe,
Numerical simulation study of magnetization precession
dynamics in submicrometer elliptical Ni80Fe20 thin-film elements,
IEEE Transactions on Magnetics,
vol. 42, no. 10, pp. 3216-3218, Oct. 2006.
Kenneth J. Hass, Gregory Donohoe, Yang-Ki Hong, Byoung-Chul Choi,
Kelly DeGregorio, and Richard Hayhurst,
Integrated Magnetic Memory for Embedded Computing Systems,
IEEE Aerospace Conference,
March 5-9, 2007.
William Walker, Gregory Donohoe, David Buehler,
Joe Hass, Chris Canine, and Pen-Shu Yeh,
The Field Programmable Processor Array:
Design and Testing,
13th NASA Symposium on VLSI Design,
May 5-6, 2007.
Proceedings paper, Acrobat pdf, 1548k
Jody W. Gambles, Kenneth J. Hass and Kelly B. Cameron,
Apparatus For And Method Of Eliminating Single Event Upsets In Combinational Logic,
U.S. Patent 6,326,809,
December 4, 2001.
Gary Maki, Kenneth Hass, Shi Quan and James Murguia,
Conflict Free Radiation Tolerant Storage Cell,
U.S. Patent 6,573,773,
June 3, 2003.
Patent, Acrobat pdf, 876k
Gary K. Maki, Jody W. Gambles and Kenneth J. Hass,
Radiation Tolerant Back Biased CMOS VLSI,
U.S. Patent 6,583,470,
June 24, 2003.
Patent, Acrobat pdf, 1088k
Kenneth J. Hass,
Self Regulating Body Bias Generator,
U.S. Patent 6,731,158,
May 4, 2004.
Patent, Acrobat pdf, 928k
Last Modified: Fri May 23 11:18:12 PDT 2008